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Instruction set architecture
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91	United States Market Trends as Revealed by the Top 500 Add to Reading List Source URL: lsmarr.calit2.net Language: English - Date: 2010-01-24 19:41:29 Computing Computer architecture Supercomputers Concurrent computing Distributed computing architecture Parallel computing Instruction set architectures TOP500 Silicon Graphics ASCI Red Cray 64-bit computing
92	Efficient Software Implementation of Binary Field Arithmetic Using Vector Instruction Sets Diego F. Aranha Department of Computer Science University of Bras´ılia Joint work with Add to Reading List Source URL: caramba.loria.fr Language: English Computer architecture Computing X86 instructions Binary arithmetic Computer engineering Central processing unit Computer arithmetic Instruction set Streaming SIMD Extensions Bitwise operation Bit manipulation SSSE3
93	Gregory Ichneumon Brown Web: www.gregorypbrown.com Phone: Add to Reading List Source URL: greg.ichneumon.net Language: English - Date: 2015-01-21 23:31:22 Computer architecture Computing Instruction set architectures Computer engineering Parallel computing Classes of computers Advanced RISC Computing MIPS instruction set System on a chip PowerPC Computer Multiprocessing
94	Procedure Call Standard for the ARM Architecture Add to Reading List Source URL: infocenter.arm.com Language: English Subroutines Central processing unit Acorn Computers ARM architecture Calling convention Application binary interface Pointer 64-bit computing Processor register Stack SIMD Instruction set
95	Modular Deductive Verification of Multiprocessor Hardware Designs Muralidaran Vijayaraghavan1 , Adam Chlipala1 , Arvind1 , and Nirav Dave2 1 MIT {vmurali,adamc,arvind}@csail.mit.edu Add to Reading List Source URL: plv.csail.mit.edu Language: English - Date: 2015-12-16 11:34:18 Computing Computer architecture Computer hardware Microprocessors Central processing unit IBM PC compatibles Instruction set architectures Microcomputers Program counter X86
96	Transformer: A Functional-Driven Cycle-Accurate Multicore Simulator Zhenman Fang1,2 , Qinghao Min2 , Keyong Zhou2 , Yi Lu2 , Yibin Hu2 , Weihua Zhang2 , Haibo Chen3 , Jian Li4 , Binyu Zang2 1 The State Key Lab of ASIC & Add to Reading List Source URL: ipads.se.sjtu.edu.cn Language: English - Date: 2012-08-23 22:17:16 Parallel computing Central processing unit Computer architecture Instruction set architectures Microprocessors CPU cache Computer architecture simulator ARM architecture Multi-core processor Speedup Emulator Microcode
97	The Newsletter of the Wakefield RISC OS Computer Club For all users of the Acorn and RISC OS family of computers Add to Reading List Source URL: www.wrocc.org.uk Language: English - Date: 2016-04-03 05:02:22 Computer architecture Software Computing Single-board computers Linux-based devices Microcontrollers ARM architecture Personal computers RISC OS Raspberry Pi RiscPC Reduced instruction set computing
98	Everybody be cool, this is a roppery! Vincenzo Iozzo zynamics GmbH Tim Kornau zynamics GmbH Add to Reading List Source URL: www.trailofbits.com Language: English - Date: 2016-04-15 11:36:17 Computing Computer architecture Computer engineering Central processing unit Return-oriented programming Instruction set Processor register Machine code Reduced instruction set computing Gadget Subroutine Stack machine
99	INSTITUTO POLITECNICO NACIONAL CENTRO DE INVESTIGACION EN COMPUTACION LABORATORIO DE MICROTECNOLOGIA Y SISTEMAS EMBEBIDOS Alligator_OS: An embedded OS Add to Reading List Source URL: aalonso.files.wordpress.com Language: English - Date: 2011-11-08 00:23:00 Computer architecture Computing Software Instruction set architectures Power Architecture Reconfigurable computing Xilinx Field-programmable gate array PowerPC Linux kernel Linux Embedded system
100	eth_scientific_poster_portrait_02 Add to Reading List Source URL: iis-projects.ee.ethz.ch Language: English - Date: 2016-01-28 11:01:33 Instruction set architectures ARM architecture Microcontrollers Integrated circuits ARM Cortex-M RISC-V JTAG ICE

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